SPARC

views updated May 29 2018

SPARC Trademark; Acronym for scalable processor architecture. Sun Microsystems' RISC architecture intended for multiple implementations with differing cost-performance requirements for workstations, compute servers, etc. The SPARC processor design is based on the early fundamental RISC processor design at the University of California, Berkeley. The architecture provides a 24-register window into a larger register set as local space for a procedure, plus an additional 8 global registers. The 24-register window is moved by 16-register positions on procedure call leaving an 8-register overlap with the window of the calling procedure. This technique normally avoids the reuse of a procedure's register set and hence the need to preserve register contents prior to procedure call; the overlap provides efficient parameter passing between calling and called procedures. If the depth of procedure nesting exceeds the number of register windows, then the oldest window is preserved in memory prior to procedure entry and its reuse; it must be recovered from memory before a return is made to this oldest procedure. The number of overlapping windows comprising the register set will determine the frequency of the need to preserve and recover register windows from memory. The number is a cost-performance design decision; eight is typical.

SPARC

views updated May 14 2018

SPARC

The Scholarly Publishing and Academic Resources Coalition (SPARC) was founded to offer an affordable alternative to the high-priced scientific and high- tech journals on the marketplace. By publishing the latest scientific discoveries and research findings through print and online articles, SPARC helps meet the needs of the library market, as well as the scientific, technical, and medical fields.

SPARC

views updated Jun 11 2018

SPARC (spɑːk) Computing scalable processor architecture