Computer chips are at the heart of the modern technology revolution. But what are they made of and how are they made? They are made primarily of transistors, which act as electrical switches in digital circuits, and metal wires. The most significant type of transistor, from an economic perspective, is the complementary metal oxide semiconductor (CMOS) transistor. This is a three-terminal device consisting of a gate (metal), a source, and a drain. The gate is an electrical switch that controls the flow of electrons from the source to the drain. Applying a voltage turns "on" the gate, which directs an electric field across a thin silicon dioxide film, causing the semiconductor material to become conductive and thereby allowing electrons to flow. If the gate voltage is turned "off," the electrons go away. Transistors being "on" or "off" correspond to the binary "1" and "0."
So how are these transistors and wires made? The devices and wires on a chip are fabricated at the same time, alongside hundreds of other chips, using a process known as batch fabrication. It does not cost any more to fabricate 1,000 transistors than 100 transistors—or many million of transistors for that matter! This is known as batch fabrication and it results in substantial economies of scale that make chips inexpensive despite their complexity.
It all starts with silicon —the primary constituent of sand, and therefore abundant and inexpensive. The silicon is purified, and large cylindrical crystals one to two meters (three to six feet) long and up to one-third meter (twelve inches) in diameter are grown. These crystals are sliced into wafers 500–750 micrometers thick that form the substrate for the chips. The chip designer provides the chip manufacturer with a set of photomasks that contain a physical representation of the transistors and associated wires to be reproduced on the wafer. Photomasks are made of glass and chrome and define regions where light can penetrate (glass), and others where the light cannot penetrate (chrome), similar to a stencil. In a 0.18 micrometer, six metal layer process, up to twenty-five such photomasks are used.
One set of photomasks is used to define where dopant elements will be added. What are dopants? They are elements—such as boron, phosphorus, and arsenic—added to the silicon that allow the charge-carrying characteristics of the material to be altered in a controllable fashion, facilitating the formation of transistors. Another set of photomasks is used in a set of successive steps whereby a thin film (typically less than one micrometer, or 1 m) is deposited on the wafer, a thin photosensitive polymer film is placed on top, and the pattern from the photomask is transferred to the photosensitive polymer by shining light on the photomask. The thin film is etched where the photosensitive polymer has been removed, and finally the photosensitive polymer is removed. These steps are repeated to fabricate the transistor gate, the wires that connect the transistors together, and the insulating films that separate the metal wires from each other. After the circuits have been fabricated—a process that can take twenty to thirty days in a 0.18 m CMOS production plant—the wafers are cut into small chips and individually packaged.
Now that these chips are ready, how fast will they run? The speed depends on the amount of time the transistors take turning on and off and the delay imposed by the wiring. The length of the gate determines the switching time of transistors: the shorter the gate, the faster the device can switch. Wiring delays come from two primary sources—the time it takes to charge the wire up to the necessary voltage and the time it takes for a signal to travel a given distance. The former is reduced when the size of the wire is shrunk, so as chip miniaturization progresses, this delay decreases. The travel time is set by the speed of light and the material properties. For typical materials, signals travel 15 centimeters (about 6 inches) in a billionth of a second, which means that it will take over a quarter of a clock cycle to travel across a 2 centimeter (about 3/4 of a inch) chip running at 2 GHz. Historically, the frequency at which microprocessors operate has doubled every two years!
The scaling of features to smaller dimensions (known as technology scaling) improves performance while decreasing cost. Technology scaling basically means more computing power is packed into increasingly smaller physical space. Scaling propels the semiconductor market growth, which in turn generates sufficient profit to develop increasingly aggressive technology generations—scaling begets scaling! This cycle fuels what is known as "Moore's Law," which states that the number of transistors per integrated circuit doubles every eighteen months. Since the length of the gate is a primary indicator of the speed of a process, it is associated with a generation of computer chip technology. Not only do microprocessors get faster as the gate length decreases, but if one is making memory chips, more memory can be packed on the chip.
Economics of Chip Manufacturing
Just as computer chips have decreased in size and increased in power in each generation, semiconductor sales as a percent of the Gross World Product (GWP) have doubled every three technology generations. The manufacturing capacity of the semiconductor industry is often measured in wafer starts per week, which is simply a tally of how many wafers are placed at the beginning of the manufacturing process. From 1998 to 2000, this figure increased by about 20 percent—from seven million to eight and a half million.
It is also important to understand that as miniaturization has occurred, the cost of the equipment necessary to fabricate the microelectronic devices has dramatically increased. This is because higher equipment quality is required to manufacture the increasingly small devices, as well as to control the dimensions of these devices within strict tolerances. Consequently, the cost of a factory has grown significantly each year, from ten million dollars in the 1980s, to almost two billion dollars in 1999. The expectation is that the cost of semiconductor manufacturing facilities will continue to increase—by about 3 percent per year due to productivity requirements and 5 percent per year for technology upgrades.
Chip making is all about packing as many transistors in as small an area as possible, to produce fast microprocessors and large amounts of memory. Chip making employs economies of scale, because most process operations are performed for many wafers at once, and each wafer contains many chips, and each chip contains many transistors. This has resulted in a tremendous return on investment for manufacturers that has far outweighed the rising manufacturing costs. It is anticipated that such trends will continue until 2030 or so.
see also Central Processing Unit; Microchip; Process Control.
Brett A. Warneke and J. Alex Chediak
Jaeger, Richard C. Introduction to Microelectronic Fabrication. Menlo Park: Addison-Wesley Publishing Company, 1993.
Streetman, Ben G., and Sanjay Banerjee. Solid State Electronic Devices. Upper Saddle River, NJ: Prentice Hall, 1999.
Moore's Law. Intel Corporation Web Site. <http://intel.com/research/silicon/mooreslaw.htm>
International Technology Roadmap for Semiconductors. ITRS Web Site. <http://public.itrs.net>
Semiconductor Industry Association Web Site. <http://www.semichips.org/stats/>