Self-test for FPGAs and CPLDs requires no overhead. (Field Programmable Gate Arrays; Circuit Programmable Logic Designs)

From: EDN | Date: November 6, 1997| Author: Abramovici, Miron; Lee, Eric; Stroud, Charles; Underwood, Mark | Copyright information

The Field Programmable Gate Arrays and Circuit Programmable Logic Designs must be tested at the system-manufacturing level and in the field because of their complexities. The application-specific test patterns for in-circuit board testing and offline system-diagnostic-software routines for field testing are traditional methods in testing these computer logic. However, they are found to be time-consuming and expensive. Thus, a more ideal test is the comprehensive device-level FPGA and CPLD tes...

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