DSM fault models: a combination of bridging, transition, and path-delay fault models helps manufacturers achieve optimal test coverage.(deep-submicron)

Test & Measurement World | December 1, 2004| | Copyright

A key goal in manufacturing test is to maximize the quality of parts delivered to customers--ideally, shipping zero defective parts while reducing the cost of testing those parts. The arrival of deep-submicron (DSM) designs has created new problems in clock skew and power delivery, while the latest nanometer technologies have demonstrated that defects are located predominantly in routing. Failure analysis conducted by major silicon manufacturers reveals that most of part failures are timing related, and delay is the biggest culprit.

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